ц000 рам рам рам рам рам рам рам рам - ----------------------------------------------------------------------------- б000 басиц рам рам рам рам басиц ромх ромх - а000 ----------------------------------------------------------------------------- 9000 рам рам рам рам рам ромл рам ромл ромл(* 8000 ----------------------------------------------------------------------------- 7000 6000 рам рам рам рам рам рам рам рам - 5000 4000 ----------------------------------------------------------------------------- 3000 2000 рам рам рам рам рам рам рам рам - 1000 ----------------------------------------------------------------------------- 0000 рам рам рам рам рам рам рам рам рам ----------------------------------------------------------------------------- *) иNTERNAL MEMORY DOES NOT RESPOND TO WRITE ACCESSES TO THESE AREAS. лEGEND: кERNAL е000-фффф кERNAL ром. ио/ц д000-дффф и/о ADDRESS SPACE OR цHARACTER GENERATOR ром, SELECTED BY -цхарен. иF THE цхарен BIT IS CLEAR, THE CHARACTER GENERATOR ром IS CHOSEN. иF IT IS SET, THE и/о CHIPS ARE ACCESSIBLE. ио/рам д000-дффф и/о ADDRESS SPACE OR рам, SELECTED BY -цхарен. иF THE цхарен BIT IS CLEAR, THE CHARACTER GENERATOR ром IS CHOSEN. иF IT IS SET, THE INTERNAL рам IS ACCESSIBLE. и/о д000-дффф и/о ADDRESS SPACE. тHE -цхарен LINE HAS NO EFFECT. басиц а000-бффф басиц ром. ромх а000-бффф OR еXTERNAL ром WITH THE -ромх LINE е000-фффф CONNECTED TO ITS -цс LINE. ромл 8000-9ффф еXTERNAL ром WITH THE -ромл LINE CONNECTED TO ITS -цс LINE. рам VARIOUS RANGES цOMMODORE 64'S INTERNAL рам. - 1000-7ффф AND оPEN ADDRESS SPACE. а000-цффф тHE цOMMODORE 64'S MEMORY CHIPS DO NOT DETECT ANY MEMORY ACCESSES TO THIS AREA EXCEPT THE жиц-ии'S дма AND MEMORY REFRESHES. ноте: вHENEVER THE PROCESSOR TRIES TO WRITE TO ANY ром AREA (кERNAL, басиц, цхаром, ромл, ромх), THE DATA WILL GET "THROUGH THE ром" TO THE ц64'S INTERNAL рам. фOR THIS REASON, YOU CAN EASILY COPY DATA FROM ром TO рам, WITHOUT ANY BANK SWITCHING. бUT IMPLEMENTING EXTERNAL MEMORY EXPANSIONS WITHOUT дма IS VERY HARD, AS YOU HAVE TO USE THE уLTIMAX MEMORY CONFIGURATION, OR THE DATA WILL BE WRITTEN BOTH TO INTERNAL AND EXTERNAL рам. хOWEVER, THIS IS NOT TRUE FOR THE уLTIMAX GAME CONFIGURATION. иN THAT MODE, THE INTERNAL рам IGNORES ALL MEMORY ACCESSES OUTSIDE THE AREA $0000-$0ффф, UNLESS THEY ARE PERFORMED BY THE жиц, AND YOU CAN WRITE TO EXTERNAL MEMORY AT $1000-$цффф AND $е000-$фффф, IF ANY, WITHOUT CHANGING THE CONTENTS OF THE INTERNAL рам. _а NOTE CONCERNING THE и/о AREA_ тHE и/о AREA IS DIVIDED AS FOLLOWS: аDDRESS RANGE оWNER ------------- ----- д000-д3фф мос 6567/6569 жиц-ии жIDEO иNTERFACE цONTROLLER д400-д7фф мос 6581 сид сOUND иNTERFACE дEVICE д800-дбфф цOLOR рам (ONLY LOWER NYBBLES ARE CONNECTED) дц00-дцфф мос 6526 циа цOMPLEX иNTERFACE аDAPTER #1 дд00-ддфф мос 6526 циа цOMPLEX иNTERFACE аDAPTER #2 де00-дефф уSER EXPANSION #1 (-и/о1 ON еXPANSION пORT) дф00-дффф уSER EXPANSION #2 (-и/о2 ON еXPANSION пORT) аS YOU CAN SEE, THE ADDRESS RANGES FOR THE CHIPS ARE MUCH LARGER THAN REQUIRED. бECAUSE OF THIS, YOU CAN ACCESS THE CHIPS THROUGH MULTIPLE MEMORY AREAS. тHE жиц-ии APPEARS IN ITS WINDOW EVERY $40 ADDRESSES. фOR INSTANCE, THE ADDRESSES $д040 AND $д080 ARE BOTH MAPPED TO THE сPRITE 0 ь CO-ORDINATE REGISTER. тHE сид HAS ONE REGISTER SELECTION LINE LESS, THUS IT APPEARS AT EVERY $20 BYTES. тHE циа CHIPS HAVE ONLY 16 REGISTERS, SO THERE ARE 16 COPIES OF EACH IN THEIR MEMORY AREA. хOWEVER, YOU SHOULD NOT USE OTHER ADDRESSES THAN THOSE SPECIFIED BY цOMMODORE. фOR INSTANCE, THE цOMMODORE 128 MAPPED ITS ADDITIONAL и/о CHIPS TO THIS SAME MEMORY AREA, AND THE сид RESPONDS ONLY TO THE ADDRESSES д400-д4фф, ALSO WHEN IN ц64 MODE. аND THE цOMMODORE 65, WHICH UNFORTUNATELY DID NOT MAKE ITS WAY TO THE MARKET, COULD NARROW THE MEMORY WINDOW RESERVED FOR THE мос 6569/6567 жиц-ии (OR цсг 4567 жиц-иии IN THAT MACHINE). _тHE VIDEO CHIP_ тHE мос 6567/6569 жиц-ии жIDEO иNTERFACE цONTROLLER HAS ACCESS TO ONLY 16 KILOBYTES AT A TIME. тO ENABLE THE жиц-ии TO ACCESS THE WHOLE 64 Kб MEMORY SPACE, THE MAIN MEMORY IS DIVIDED TO FOUR BANKS OF 16 Kб EACH. тHE LINES па0 AND па1 OF THE SECOND циа ARE THE INVERSE OF THE VIRTUAL жиц-ии ADDRESS LINES жа14 AND жа15, RESPECTIVELY. тO SELECT A жиц-ии BANK OTHER THAN THE DEFAULT, YOU MUST PROGRAM THE циа LINES TO OUTPUT THE DESIRED BIT PAIR. фOR INSTANCE, THE FOLLOWING CODE SELECTS THE MEMORY AREA $4000-$7ффф (BANK 1) FOR THE VIDEO CONTROLLER: лда $дд02 ; дATA дIRECTION рEGISTER а ора #$03 ; сET PINS па0 AND па1 TO OUTPUTS ста $дд02 лда $дд00 анд #$фц ; мASK THE LOWMOST BIT PAIR OFF ора #$02 ; сELECT жиц-ии BANK 1 (THE INVERSE OF BINARY 01 IS 10) ста $дд00 вHY SHOULD YOU SET THE PINS TO OUTPUTS? хARDWARE ресет RESETS ALL и/о LINES TO INPUTS, AND THANKS TO THE циа'S INTERNAL PULL-UP RESISTORS, THE INPUTS ACTUALLY OUTPUT LOGICAL HIGH VOLTAGE LEVEL. сO, UPON -ресет, THE VIDEO BANK 0 IS SELECTED AUTOMATICALLY, AND OLDER кERNALS COULD LEAVE IT UNINITIALIZED. нOTE THAT THE жиц-ии ALWAYS FETCHES ITS INFORMATION FROM THE INTERNAL рам, TOTALLY IGNORING THE MEMORY CONFIGURATION LINES. тHERE IS ONLY ONE EXCEPTION TO THIS RULE: тHE CHARACTER GENERATOR ром. уNLESS THE уLTIMAX MODE IS SELECTED, жиц-ии "SEES" CHARACTER GENERATOR ром IN THE MEMORY AREAS 1000-1ффф AND 9000-9ффф. иF THE уLTIMAX CONFIGURATION IS ACTIVE, THE жиц-ии WILL FETCH ALL DATA FROM THE INTERNAL рам. _аN APPLICATION: мAKING AN OPERATING SYSTEM EXTENSION_ иF YOU ARE MAKING A MEMORY RESIDENT PROGRAM AND WANT TO MAKE IT AS INVISIBLE TO THE SYSTEM AS POSSIBLE, PROBABLY THE BEST METHOD IS KEEPING MOST OF YOUR CODE UNDER THE и/о AREA (IN THE рам AT $д000-$дффф). тHIS AREA IS VERY SAFE, SINCE PROGRAMS UTILIZING IT ARE RARE, SINCE THEY ARE VERY DIFFICULT TO IMPLEMENT AND TO DEBUG. ыOU NEED ONLY A SHORT ROUTINE IN THE NORMALLY VISIBLE рам THAT PUSHES THE CURRENT VALUE OF THE PROCESSOR'S и/о REGISTER $01 ON STACK, SWITCHES рам ON TO $д000-$дффф AND JUMPS TO THIS AREA. рETURNING FROM THE $д000-$дффф AREA IS POSSIBLE EVEN WITHOUT ANY ROUTINE IN THE NORMALLY VISIBLE рам AREA. йUST WRITE AN ртс OR AN рти TO AN и/о REGISTER AND RETURN THROUGH IT. бUT WHAT IF YOUR PROGRAM NEEDS TO USE и/о? аND HOW CAN YOU WRITE THE RETURN INSTRUCTION TO AN и/о REGISTER WHILE THE и/о AREA IS SWITCHED OFF? ыOU NEED A SWAP AREA FOR YOUR PROGRAM IN NORMALLY VISIBLE MEMORY. тHE FIRST THING YOUR ROUTINE AT $д000-$дффф DOES IS COPYING THE и/о ROUTINES (OR THE WHOLE PROGRAM) TO NORMALLY VISIBLE MEMORY, SWAPPING THE BYTES. фOR INSTANCE, IF YOUR и/о ROUTINES ARE INITIALLY BEING STORED AT $д200-$д3фф, EXCHANGE THE BYTES IN $д200-$д3фф WITH THE CONTENTS OF $ц000-$ц1фф. нOW YOU CAN CALL THE и/о ROUTINES FROM YOUR ROUTINE AT $д000-$дффф, AND THE и/о ROUTINES CAN SWITCH THE и/о AREA TEMPORARILY ON TO ACCESS THE и/о CHIPS. аND RIGHT BEFORE EXITING YOUR PROGRAM AT $д000-$дффф SWAPS THE OLD CONTENTS OF THAT и/о ROUTINE AREA IN, E.G. EXCHANGES THE MEMORY AREAS $д200-$д3фф AND $ц000-$ц1фф AGAIN. вHAT и/о REGISTERS CAN YOU USE FOR THE RETURN INSTRUCTION? тHERE ARE BASICALLY TWO ALTERNATIVES: 8-BIT жиц SPRITE REGISTERS OR EITHER циа'S SERIAL PORT REGISTER. тHE жиц REGISTERS ARE EASIEST TO USE, AS THEY ACT PRECISELY LIKE MEMORY PLACES: YOU CAN EASILY WRITE THE DESIRED VALUE TO A REGISTER. бUT THE циа REGISTER IS USUALLY BETTER, AS CHANGING THE жиц REGISTERS MIGHT CHANGE THE SCREEN LAYOUT. хOWEVER, ALSO THE сп REGISTER HAS SOME DRAWBACKS: иF THE MACHINE'S цнт1 AND цнт2 LINES ARE CONNECTED TO A FREQUENCY SOURCE, YOU MUST STOP EITHER циа'S тIMER а TO USE THE сп REGISTER METHOD. нORMALLY THE 1ST циа'S тIMER а IS THE MAIN HARDWARE INTERRUPT SOURCE. аND IF YOU USE THE кERNAL'S рс232, YOU CANNOT STOP THE 2ND циа'S тIMER а EITHER. аLSO, IF YOU DON'T WANT TO LOSE ANY циа INTERRUPTS, YOU MIGHT WANT TO KNOW THAT EXECUTING THE ртс OR рти AT сп REGISTER HAS THE SIDE EFFECT OF READING THE иNTERRUPT цONTROL рEGISTER, THUS ACKNOWLEDGING AN INTERRUPT THAT MIGHT HAVE BEEN WAITING. иF YOU CAN'T USE EITHER METHOD, YOU CAN USE EITHER циа'S тOд SECONDS OR MINUTES OR тOд ALARM TIME FOR STORING AN рти. оR, IF YOU DON'T WANT TO ALTER ANY REGISTERS, USE THE жиц-ии'S LIGHT PEN REGISTER. бEFORE EXITING, WAIT FOR APPROPRIATE RASTER LINE AND TRIG THE LIGHT PEN LATCH WITH циа1'S пб4 BIT. хOWEVER, THIS METHOD ASSUMES THAT THE CONTROL PORT 1'S BUTTON/LIGHT PEN LINE REMAINS UP FOR THAT FRAME. аFTER TRIGGING THE LIGHT PEN, CAUSING THE LIGHT PEN ы CO-ORDINATE REGISTER ($д014) TO BE $40 OR $60, YOU HAVE MORE THAN HALF A FRAME TIME TO RESTORE THE STATE OF THE и/о CHIPS AND RETURN THROUGH THE REGISTER. ыOU CAN ALSO USE THE сид TO STORE AN рти OR ртс COMMAND. хOW IS THIS POSSIBLE, YOU MIGHT ASK. аFTER ALL, THE CHIP CONSISTS OF READ ONLY OR WRITE ONLY REGISTERS. хOWEVER, THERE ARE TWO REGISTERS THAT CAN BE CONTROLLED BY PROGRAM, THE ENVELOPE GENERATOR AND OSCILLATOR OUTPUTS OF THE THIRD VOICE. тHIS METHOD REQUIRES YOU TO CHANGE THE FREQUENCY OF VOICE 3 AND TO SELECT A WAVEFORM FOR IT. тHIS WILL AFFECT ON THE VOICE OUTPUT BY TURNING THE VOICE 3 OFF, BUT WHO WOULD KEEP THE VOICE 3 PRODUCING A TONE WHILE CALLING AN OPERATING SYSTEM ROUTINE? аLSO KEEP IN MIND THAT THE USER COULD PRESS ресторе WHILE THE кERNAL ром AND и/о AREAS ARE DISABLED. ыOU COULD WRITE YOUR OWN NON-MASKABLE INTERRUPT (нми) HANDLER (USING THE нми VECTOR AT $фффа), BUT A FAST LOADER THAT USES VERY TIGHT TIMING WOULD STILL STOP WORKING IF THE USER PRESSED ресторе IN THE MIDDLE OF A DATA BLOCK TRANSFER. сO, TO MAKE A ROBUST PROGRAM, YOU HAVE TO DISABLE нми INTERRUPTS. бUT HOW IS THIS POSSIBLE? тHEY ARE нON-мASKABLE AFTER ALL. тHE нми INTERRUPT IS EDGE-SENSITIVE, THE PROCESSOR JUMPS TO нми HANDLER ONLY WHEN THE -нми LINE DROPS FROM +5ж TO GROUND. тO DISABLE THE INTERRUPT, SIMPLY CAUSE AN нми WITH циа2'S TIMER, BUT DON'T READ THE иNTERRUPT цONTROL REGISTER. иF YOU NEED TO READ $дд0д IN YOUR PROGRAM, YOU MUST ADD A нми HANDLER JUST IN CASE THE USER PRESSES ресторе. аND DON'T FORGET TO RAISE THE -нми LINE UPON EXITING THE PROGRAM. оTHERWISE THE ресторе KEY DOES NOT WORK UNTIL THE USER ISSUES A -ресет OR READS THE ицр REGISTER EXPLICITLY. (тHE кERNAL DOES NOT READ $дд0д, UNLESS IT IS HANDLING AN INTERRUPT.) тHIS CAN BE DONE AUTOMATICALLY BY THE TWO FOLLOWING сп REGISTER EXAMPLES DUE TO ONE OF THE 6510'S UNDOCUMENTED FEATURES (REFER TO THE DESCRIPTIONS OF ртс AND рти BELOW). ; рETURNING VIA жиц SPRITE 7 ь CO-ORDINATE REGISTER иNITIALIZATION: ; тHIS IS EXECUTED WHEN и/о IS SWITCHED ON лда #$60 ста $д015 ; вRITE ртс TO жиц REGISTER $15. еXITING: ; ноте: тHIS PROCEDURE MUST START AT жиц REGISTER ; $12. ыOU HAVE MULTIPLE ALTERNATIVES, AS THE жиц ; APPEARS IN MEMORY AT $д000+$40*N, WHERE $0<=N<=$ф. пла ; пULL THE SAVED 6510 и/о REGISTER STATE FROM STACK ста $01 ; рESTORE ORIGINAL MEMORY BANK CONFIGURATION ; нOW THE PROCESSOR FETCHES THE ртс COMMAND FROM THE ; жиц REGISTER $15. ; рETURNING VIA циа 2'S тOд OR тOд ALARM SECONDS REGISTER иNITIALIZATION: ; тHIS IS EXECUTED WHEN и/о IS SWITCHED ON лда #$40 ста $дд08 ; сET тOд TENTHS OF SECONDS ; (CLEAR IT SO THAT THE SECONDS REGISTER ; WOULD NOT OVERFLOW) ; иF тOд ALARM REGISTER IS SELECTED, THIS ; INSTRUCTION WILL BE UNNECESSARY. ста $дд09 ; сET тOд SECONDS лда $дд0б ; рEAD тOд HOURS (FREEZE тOд DISPLAY) еXITING: ; ноте: тHIS PROCEDURE MUST START AT циа 2 REGISTER ; $6. аS THE циа 2 APPEARS IN MEMORY AT $дд00+$10*N, ; WHERE 0<=N<=$ф, YOU HAVE SIXTEEN ALTERNATIVES. пла ста $01 ; рESTORE ORIGINAL MEMORY BANK CONFIGURATION ; нOW THE PROCESSOR FETCHES THE ртс COMMAND FROM ; THE циа 2 REGISTER $9. ; рETURNING VIA циа 2'S сп REGISTER (ASSUMING THAT цнт2 IS STABLE) иNITIALIZATION: ; тHIS IS EXECUTED WHEN и/о IS SWITCHED ON лда $дд0е ; циа 2'S цONTROL рEGISTER а анд #$бф ; сET сERIAL пORT TO INPUT ста $дд0е ; (MAKE THE сп REGISTER TO ACT AS A MEMORY PLACE) лда #$60 ста $дд0ц ; вRITE ртс TO циа 2 REGISTER $ц. еXITING: ; ноте: тHIS PROCEDURE MUST START AT циа 2 REGISTER ; $9. аS THE циа 2 APPEARS IN MEMORY AT $дд00+$10*N, ; WHERE 0<=N<=$ф, YOU HAVE SIXTEEN ALTERNATIVES. пла ста $01 ; рESTORE ORIGINAL MEMORY BANK CONFIGURATION ; нOW THE PROCESSOR FETCHES THE ртс COMMAND FROM ; THE циа 2 REGISTER $ц. ; рETURNING VIA циа 2'S сп REGISTER, STOPPING THE тIMER а ; AND FORCING сп2 AND цнт2 TO OUTPUT иNITIALIZATION: ; тHIS IS EXECUTED WHEN и/о IS SWITCHED ON лда $дд0е ; циа 2'S цONTROL рEGISTER а анд #$фе ; сTOP тIMER а ора #$40 ; сET сERIAL пORT TO OUTPUT ста $дд0е ; (MAKE THE сп REGISTER TO ACT AS A MEMORY PLACE) лда #$60 ста $дд0ц ; вRITE ртс TO циа REGISTER $ц. еXITING: ; ноте: тHIS PROCEDURE MUST START AT циа 2 REGISTER ; $9. аS THE циа 2 APPEARS IN MEMORY AT $дд00+$10*N, ; WHERE 0<=N<=$ф, YOU HAVE SIXTEEN ALTERNATIVES. пла ста $01 ; рESTORE ORIGINAL MEMORY BANK CONFIGURATION ; нOW THE PROCESSOR FETCHES THE ртс COMMAND FROM ; THE циа 2 REGISTER $ц. ; рETURNING VIA сид OSCILLATOR 3 OUTPUT REGISTER иNITIALIZATION: ; тHIS IS EXECUTED WHEN и/о IS SWITCHED ON лда #$20 ; сELECT SAWTOOTH WAVEFORM ста $д412 ; BUT DO NOT ENABLE THE SOUND лды #$00 ; сELECT FREQUENCY сты $д40е ; (SYSTEM CLOCK)/$фф00, лда #$фф ; CAUSING THE осц3 OUTPUT TO INCREMENT BY ONE сты $д40ф ; EVERY $10000/$фф00 CYCLES. лда #$0е лдь #$60 бит $д41б ; вAIT FOR THE OSCILLATOR 3 OUTPUT бми *-3 ; TO BE IN THE RANGE бжс *-5 ; $00-$3ф. бит $д41б ; вAIT FOR THE OSCILLATOR 3 OUTPUT бжц *-3 ; TO BE AT LEAST $40. ста $д40ф ; сLOW DOWN THE FREQUENCY TO (SYSTEM CLOCK)/$0е00. цпь $д41б ; вAIT FOR THE OSCILLATOR 3 бне *-3 ; OUTPUT TO REACH $60 (ртс) сты $д40ф ; рESET THE FREQUENCY OF VOICE 3 ; (STOP THE осц3 REGISTER FROM INCREASING) еXITING: ; ноте: тHIS PROCEDURE MUST START AT сид REGISTER ; $18. аS THE сид APPEARS IN MEMORY AT $д400+$20*N, ; WHERE 0<=N<=$20, YOU HAVE THIRTY-TWO ALTERNATIVES. ; хOWEVER, IN ц128 THERE ARE ONLY EIGHT ALTERNATIVES, ; AS THE сид IS ONLY AT $д400-$д4фф. пла ста $01 ; рESTORE ORIGINAL MEMORY BANK CONFIGURATION ; нOW THE PROCESSOR FETCHES THE ртс COMMAND FROM ; THE сид REGISTER $1б. фOR INSTANCE, IF YOU WANT TO MAKE A HIGHLY COMPATIBLE FAST LOADER, MAKE THE илоад VECTOR ($0330) POINT TO THE BEGINNING OF THE STACK AREA. рEMEMBER THAT THE басиц INTERPRETER USES THE FIRST BYTES OF STACK WHILE CONVERTING NUMBERS TO TEXT. а GOOD ADDRESS IS $0120. рOBUST PROGRAMS PRACTICALLY NEVER USE SO MUCH STACK THAT IT COULD CORRUPT THIS ROUTINE. уSUALLY ONLY CRUNCHED PROGRAMS (DEMOS AND ALIKE) USE ALL STACK IN THE DECOMPRESSION PHASE. тHEY ALSO MAKE USE OF THE $д000-$дффф AREA. тHIS STACK ROUTINE WILL JUMP TO YOUR ROUTINE AT $д000-$дффф, AS DESCRIBED ABOVE. фOR PERFORMANCE'S SAKE, COPY THE WHOLE BYTE TRANSFER LOOP TO THE SWAP AREA, E.G. $ц000-$ц1фф, AND CALL THAT SUBROUTINE AFTER DOING THE PRELIMINARY WORK. бUT WHAT ABOUT FILES THAT LOAD OVER $ц000-$ц1фф? вOULDN'T THAT DESTROY THE TRANSFER LOOP AND JAM THE MACHINE? нOT NECESSARILY. иF YOU COPY THOSE BYTES TO YOUR SWAP AREA AT $д000-$дффф, THEY WILL BE LOADED PROPERLY, AS YOUR PROGRAM RESTORES THE ORIGINAL $ц000-$ц1фф AREA. иF YOU WANT TO MAKE YOUR PROGRAM USER-FRIENDLY, PUT A VECTOR INITIALIZATION ROUTINE TO THE STACK AREA AS WELL, SO THAT THE USER CAN RESTORE THE FAST LOADER BY ISSUING A сыс COMMAND, RATHER THAN LOADING IT EACH TIME HE HAS PRESSED ресет. _аN EXAMPLE: а "HELLO WORLD" PROGRAM_ тO HELP YOU IN GETTING STARTED, и HAVE WRITTEN A SMALL EXAMPLE PROGRAM THAT ECHOES THE FAMOUS MESSAGE "HELLO, WORLD!" TO STANDARD OUTPUT (NORMALLY SCREEN) USING THE кERNAL'S цхроут SUBROUTINE. аFTER THE INITIALIZATION ROUTINE HAS BEEN RUN, THE PROGRAM CAN BE STARTED BY COMMANDING сыс 300. и USED THE цOMMODORE 128'S MACHINE LANGUAGE MONITOR TO PUT IT UP, BUT IT WAS STILL PRETTY DIFFICULT TO DEBUG THE PROGRAM. хERE IT IS IN UUENCODED FORMAT: BEGIN 644 HELLO мю0@+",д'гц(п-ц$ююю!ьи0%(*?б%ю:(,о3ю(г2п!ра#вххн]/юб=8]в*т/=х ма0%88*4!йбгь"01ьа0%,и-вфю:*!ц@в=х@".!=вхц@3=хмж.#мжб0(ь,в<8! м8*4!2юд#а0&@#+дсп"#2_ь@0]жб%ю6юа1$я23у<@+$],3$5(бдбм^о](к?о_ м2*д6ц?к_й<"-^_\@в-т@ю,!хц?о_:(вз_рю=п"#<в6бхй0!(ноь"ю=ю#_@,! 5аю&@/[ьюп+едв9дюп(й99-ж($/!@ ю END иN ORDER TO FULLY UNDERSTAND THE OPERATION OF THIS PROGRAM, YOU NEED TO KNOW HOW THE INSTRUCTIONS рти, ртс AND пха WORK. тHERE IS SOME WORK GOING ON TO REVERSE ENGINEER THE нмос 6502 MICROPROCESSOR TO LARGE EXTENT, AND IT IS NOW KNOWN FOR MOST INSTRUCTIONS WHAT MEMORY PLACES THEY ACCESS DURING THEIR EXECUTION AND FOR WHAT PURPOSE. тHE INTERNAL PROCEDURES HAVEN'T BEEN DESCRIBED IN DETAIL YET, BUT THESE DESCRIPTIONS SHOULD BE EASIER TO READ ANYWAY. фOR CURIOSITY, и QUOTE HERE THE DESCRIPTION OF ALL INSTRUCTIONS THAT USE THE STACK. тHE DESCRIPTIONS OF INTERNAL OPERATIONS ARE YET INACCURATE, BUT THE MEMORY ACCESSES HAVE BEEN VERIFIED WITH AN OSCILLOSCOPE. и WILL MAIL COPIES THE WHOLE DOCUMENT UPON REQUEST. вHEN FINISHED, THE DOCUMENT WILL BE PUT ON AN фтп SITE. йср # ADDRESS р/в DESCRIPTION --- ------- --- ------------------------------------------------- 1 пц р FETCH OPCODE, INCREMENT пц 2 пц р FETCH ADDRESS'S LOW BYTE TO LATCH, INCREMENT пц 3 $0100,с р 4 $0100,с в PUSH пцх ON STACK, DECREMENT с 5 $0100,с в PUSH пцл ON STACK, DECREMENT с 6 пц р COPY LATCH TO пцл, FETCH ADDRESS'S HIGH BYTE TO LATCH, COPY LATCH TO пцх ртс # ADDRESS р/в DESCRIPTION --- ------- --- ----------------------------------------------- 1 пц р FETCH OPCODE, INCREMENT пц 2 пц р READ NEXT INSTRUCTION BYTE (AND THROW IT AWAY), INCREMENT пц 3 $0100,с р INCREMENT с 4 $0100,с р PULL пцл FROM STACK, INCREMENT с 5 $0100,с р PULL пцх FROM STACK 6 пц р INCREMENT пц брк # ADDRESS р/в DESCRIPTION --- ------- --- ----------------------------------------------- 1 пц р FETCH OPCODE, INCREMENT пц 2 пц р READ NEXT INSTRUCTION BYTE (AND THROW IT AWAY), INCREMENT пц 3 $0100,с в PUSH пцх ON STACK, DECREMENT с 4 $0100,с в PUSH пцл ON STACK, DECREMENT с 5 $0100,с в PUSH п ON STACK (WITH б FLAG SET), DECREMENT с, SET и FLAG 6 $фффе р FETCH пцл 7 $фффф р FETCH пцх рти # ADDRESS р/в DESCRIPTION --- ------- --- ----------------------------------------------- 1 пц р FETCH OPCODE, INCREMENT пц 2 пц р READ NEXT INSTRUCTION BYTE (AND THROW IT AWAY), INCREMENT пц 3 $0100,с р INCREMENT с 4 $0100,с р PULL п FROM STACK, INCREMENT с 5 $0100,с р PULL пцл FROM STACK, INCREMENT с 6 $0100,с р PULL пцх FROM STACK пха, пхп # ADDRESS р/в DESCRIPTION --- ------- --- ----------------------------------------------- 1 пц р FETCH OPCODE, INCREMENT пц 2 пц р READ NEXT INSTRUCTION BYTE (AND THROW IT AWAY), INCREMENT пц 3 $0100,с в PUSH REGISTER ON STACK, DECREMENT с пла, плп # ADDRESS р/в DESCRIPTION --- ------- --- ----------------------------------------------- 1 пц р FETCH OPCODE, INCREMENT пц 2 пц р READ NEXT INSTRUCTION BYTE (AND THROW IT AWAY), INCREMENT пц 3 $0100,с р INCREMENT с 4 $0100,с р PULL REGISTER FROM STACK тHE EXAMPLE PROGRAM CONSISTS OF THREE PARTS. тHE FIRST PART TRANSFERS THE OTHER PARTS TO APPROPRIATE MEMORY AREAS. тHE SECOND PART IS LOCATED IN STACK AREA (300-312), AND IT INVOKES THE THIRD PART, THE MAIN MODULE. тHE LOADER PART ($0801-$08ц7) IS AS FOLLOWS: 1993 сыс2061 080д сеи дISABLE INTERRUPTS. 080е лда $01 0810 пха сTORE THE STATE OF THE PROCESSOR'S и/о LINES. 0811 анд #$ф8 0813 ста $01 сELECT 64 Kб рам MEMORY CONFIGURATION. 0815 лдь #$0ц цOPY THE INVOKING PART TO 300-312. 0817 лда $0830,ь 081а ста $012ц,ь 081д деь 081е бпл $0817 0820 лдь #$8б цOPY THE MAIN PART TO $дд64-$ддее. 0822 лда $083ц,ь 0825 ста $дд63,ь 0828 деь 0829 бне $0822 082б пла рESTORE ORIGINAL MEMORY CONFIGURATION. 082ц ста $01 082е цли еNABLE INTERRUPTS. 082ф ртс рETURN. тHE USER INVOKES THE FOLLOWING PART BY ISSUING сыс 300. тHIS PART CHANGES THE MEMORY CONFIGURATION AND JUMPS TO THE MAIN PART. 012ц лда $01 012е таь сTORE ORIGINAL MEMORY CONFIGURATION TO ь REGISTER. 012ф анд #$ф8 0131 ора #$04 0133 сеи дISABLE INTERRUPTS. 0134 ста $01 сELECT 64 Kб рам MEMORY CONFIGURATION. 0136 ймп $дда4 йUMP TO THE MAIN PART. тHE MAIN PART ACTUALLY CONSISTS OF TWO PARTS. иT MAY BE A BIT COMPLICATED, AND IT MIGHT TEACH NEW TRICKS TO YOU. дда4 тьа дда5 пха пUSH ORIGINAL MEMORY CONFIGURATION ON STACK. дда6 лда $фффа дда9 пха ддаа лда $фффб ддад пха сTORE THE ORIGINAL VALUES OF $фффа AND $фффб. ддае лда #$16 ддб0 ста $фффа сET ($фффа) TO POINT TO рти. ддб3 лда #$ц0 ддб5 ста $фффб ддб8 йср $дддц сWAP THE AUXILIARY ROUTINES IN. ддбб йср $ц000 дISABLE нми'S AND INITIALIZE циа2. ддбе пла ддбф ста $фффб рESTORE ORIGINAL VALUES TO $фффа AND $фффб. ддц2 пла ддц3 ста $фффа ддц6 йср $ц01д пRINT THE MESSAGE. ддц9 йср $дддц сWAP THE AUXILIARY ROUTINES OUT. ддцц пла ддцд таы лOAD ORIGINAL MEMORY CONFIGURATION TO ы REGISTER. ддце лда #$00 пUSH DESIRED STACK REGISTER VALUE ON STACK ддд0 пха (CLEAR ALL FLAGS, ESPECIALLY THE и FLAG). ддд1 тсь ддд2 инц $0102,ь иNCREMENT THE RETURN ADDRESS. ддд5 бне $ддда (ртс PREINCREMENTS IT, BUT рти DOES NOT.) ддд7 инц $0103,ь ддда сты $01 рESTORE ORIGINAL MEMORY CONFIGURATION. (тHE 6510 FETCHES THE NEXT INSTRUCTION FROM $дддц, WHICH IS NOW CONNECTED TO THE циа2'S REGISTER $ц, THE сERIAL пORT REGISTER. тHE INITIALIZATION ROUTINE WROTE AN рти TO IT. тHE PROCESSOR ALSO READS FROM $дддд AS A SIDE EFFECT OF THE INSTRUCTION FETCH, THUS RE-ENABLING нми'S.) дддц лды #$3ф сUBROUTINE: сWAP THE MEMORY AREAS $ц000-$ц03ф ддде лдь $ц000,ы AND $дд64-$дда3 WITH EACH OTHER. дде1 лда $дд64,ы дде4 ста $ц000,ы дде7 тьа дде8 ста $дд64,ы ддеб деы ддец бпл $ддде ддее ртс ц000 инц $01 еNABLE THE и/о AREA. ц002 лдь #$81 ц004 сть $дд0д еNABLE тIMER а INTERRUPTS OF циа2. ц007 лдь #$00 ц009 сть $дд05 ц00ц инь ц00д сть $дд04 пREPARE тIMER а TO COUNT FROM 1 TO 0. ц010 лдь #$дд ц012 сть $дд0е цAUSE AN INTERRUPT. (тHE INSTRUCTION SETS сп TO OUTPUT, MAKES тIMER а TO COUNT SYSTEM CLOCK PULSES, FORCES THE циа TO LOAD THE INITIAL VALUE TO THE COUNTER, SELECTS ONE-SHOT COUNTING AND STARTS THE TIMER.) ц015 лдь #$40 (тHE PROCESSOR NOW JUMPS TO THE нми HANDLER ($ц016), AND THE сп REGISTER STARTS TO ACT AS A MEMORY PLACE.) ц017 сть $дд0ц вRITE AN рти TO сERIAL пORT REGISTER. ц01а дец $01 дISABLE THE и/о AREA. ц01ц ртс рETURN. ц01д лда $01 ц01ф пха ц020 ора #$03 еNABLE и/о AND ромS. ц022 ста $01 ц024 лды #$0ц пRINT THE MESSAGE. ц026 лда $ц033,ы ц029 йср $ффд2 ц02ц деы ц02д бпл $ц026 ц02ф пла ц030 ста $01 рESTORE THE 64 Kб MEMORY CONFIGURATION. ц032 ртс ц033 "!длров ,оллех" (тHE STRING IS BACKWARDS IN MEMORY, SINCE и DON'T WANT TO WASTE CYCLES IN EXPLICIT COMPARISONS. тHIS METHOD RESULTS IN MORE READABLE CODE THAN DOING A FORWARD LOOP WITH AN INDEX VALUE $100-(NUMBER OF CHARACTERS).) тHIS PROGRAM IS NOT EXCELLENT. иT HAS THE FOLLOWING BUGS: O тHE 6510'S MEMORY MANAGEMENT LINES п0 AND п1 (лорам AND хирам, RESPECTIVELY) ARE ASSUMED TO BE OUTPUTS. иF YOU ISSUED THE COMMAND поке0,пеек(0)анд252, THIS PROGRAM WOULD NOT WORK. тHIS COULD BE EASILY CORRECTED BY SETTING THE п0 AND п1 LINES TO OUTPUT IN THE BEGINNING OF THE INTERFACING ROUTINE (300 - 312): лда $00 ора #$02 ста $00 O тHE PROGRAM DOES NOT RESTORE THE ORIGINAL STATE OF THE циа2 цONTROL рEGISTER а OR иNTERRUPT цONTROL рEGISTER. иT MIGHT BE IMPOSSIBLE TO START USING THE кERNAL'S рс-232 ROUTINES AFTER RUNNING THIS. O иF THE USER REDIRECTED OUTPUT TO CASSETTE OR рс-232, INTERRUPTS WOULD BE REQUIRED. хOWEVER, THEY ARE COMPLETELY DISABLED. O иF A NON-MASKABLE INTERRUPT OCCURS WHILE THE LOADER PART IS BEING EXECUTED, THE PROGRAM WILL SCREW UP. тHIS WILL HAPPEN ALSO IN THE MAIN PART, IF AN нми IS ISSUED AFTER DISABLING ромS AND и/о IN $0134 BUT BEFORE EXCHANGING THE CONTENTS OF THE MEMORY PLACES $ц016 AND $дд7а. _фREEZER CARTRIDGES_ тHERE ARE MANY CARTRIDGES THAT LET YOU TO STOP ALMOST ANY PROGRAM FOR "BACK-UP" PURPOSES. оNE OF THE MOST POPULAR OF THESE FREEZER CARTRIDGES IS THE аCTION рEPLAY жи MADE BY дATEL еLECTRONICS BACK IN 1989. тHE CARTRIDGE HAS 8 KILOBYTES рам AND 32 KILOBYTES ром ON BOARD, AND IT HAS A CUSTOM CHIP FOR FIDDLING WITH THE ц64 CARTRIDGE PORT LINES -еьром, -гаме, -иря, -нми AND ба. иF THE -нми LINE IS NOT ASSERTED (THE нми INTERRUPTS ARE ENABLED), ALL FREEZER CARTRIDGES SHOULD BE ABLE TO HALT ANY PROGRAM. вHEN THE USER PRESSES THE "FREEZE" BUTTON, THE CARTRIDGES HALT THE PROCESSOR BY DROPPING THE ба LINE LOW. тHEN THEY SWITCH SOME OF THEIR OWN ром TO THE $е000 - $фффф BLOCK BY SELECTING THE уLTIмAX CONFIGURATION WITH THE -еьром AND -гаме LINES. аFTER THIS, THEY ASSERT THE -нми LINE AND RELEASE THE ба LINE. аFTER COMPLETING THE CURRENT INSTRUCTION, THE PROCESSOR WILL TAKE THE нми INTERRUPT AND LOAD THE PROGRAM COUNTER FROM THE VECTOR AT $фффа, PROVIDED THAT THE нми LINE WAS NOT ASSERTED ALREADY. тHIS APPROACH IS PRONE TO MANY FLAWS. фIRSTLY, IF THE PROCESSOR IS EXECUTING A WRITE INSTRUCTION WHEN THE PROGRAM IS BEING HALTED, AND IF THE WRITE OCCURRED OUTSIDE THE AREA $0000 - $0ффф, THE DATA WOULD GET LOST, IF THE уLTIмAX CONFIGURATION WAS ASSERTED TOO EARLY. тHIS CAN BE CORRECTED TO SOME EXTENT BY WAITING AT LEAST TWO CYCLES AFTER ASSERTING THE ба LINE, AS THE PROCESSOR WILL NOT STOP DURING WRITE CYCLES. хOWEVER, THIS IS OF NO HELP IF THE PROCESSOR HAS NOT GOTTEN TO THE WRITE STAGE YET. сECONDLY, IF THE INSTRUCTION BEING EXECUTED IS OUTSIDE THE AREA $0000 - $0ффф, OR IF IT ACCESSES ANY DATA OUTSIDE THAT AREA, THE PROCESSOR WILL FETCH EITHER WRONG PARAMETERS OR INCORRECT DATA, OR BOTH. иF THE INSTRUCTION DOES NOT WRITE ANYTHING, WILL ONLY CORRUPT ONE PROCESSOR REGISTER. тHIRDLY, IF THE нми INTERRUPTS ARE DISABLED, PRESSING THE "FREEZE" BUTTON DOES NOT HAVE ANY OTHER IMMEDIATE EFFECT THAN LEAVING THE уLTIмAX MODE ASSERTED, WHICH MAKES ANY SYSTEM рам OUTSIDE THE AREA $0000 - $0ффф UNAVAILABLE. иT ALSO FORCES THE и/о AREA ($д000 - $дффф) ON. иF THE PROGRAM HAS ANY INSTRUCTIONS OR DATA OUTSIDE THE LOWMOST FOUR KILOBYTES, IT WILL EVENTUALLY JAM, AS THAT DATA WILL BE SOMETHING ELSE THAN THE PROGRAM EXPECTS. оNE MIGHT EXCEPT THAT READING FROM OPEN ADDRESS SPACE SHOULD RETURN RANDOM BYTES. бUT, IN AT LEAST TWO ц64'S, THE BYTES READ ARE MOSTLY $бд, WHICH IS THE OPCODE FOR лда ABSOLUTE,ь. сO, IF THE PROCESSOR HAS A "GOOD LUCK", IT WILL HAPPILY EXECUTE ONLY лда $бдбд,ь COMMANDS, AND IT MIGHT SURVIVE TO THE CARTRIDGE ром AREA WITHOUT JAMMING. оR IT COULD EVENTUALLY FETCH A брк AND JUMP TO THE CARTRIDGE ром VIA THE иря/брк VECTOR AT $фффе. тHE аCTION рEPLAY жи HAS THE FAMILIAR AUTOSTART DATA IN THE BEGINNING OF BOTH THE ромл AND ромх BLOCKS BY DEFAULT, AND THAT DATA COULD BE INTERPRETED AS SENSIBLE COMMANDS. тHE аCTION рEPLAY жи WAS INDEED ABLE TO FREEZE MY TEST PROGRAM, EVEN THOUGH и HAD COVERED ITS -ресет, -иря AND -нми LINES WITH A PIECE OF TAPE, UNTIL и RELOCATED THE PROGRAM TO THE FIRST 4 KILOBYTE BLOCK. _бUILDING AN UNBEATABLE FREEZER CIRCUIT_ аS YOU CAN SEE, IT IS TOTALLY IMPOSSIBLE TO DESIGN A FREEZER CARTRIDGE THAT FREEZES ANY PROGRAM. иF THE PROGRAM TO BE FREEZED HAS DISABLED THE нми INTERRUPTS, AND IF ITS CODE RUNS MOSTLY AT $0000 - $0ффф OR $д000 - $дффф, THE COMPUTER WILL MORE PROBABLY HANG THAN SUCCEED IN FREEZING THE PROGRAM. хOWEVER, IT IS POSSIBLE TO MAKE SOME INTERNAL MODIFICATIONS TO A ц64, SO THAT IT CAN FREEZE LITERALLY ANY PROGRAM. ыOU NEED TO EXPAND YOUR MACHINE TO 256 KILOBYTES FOLLOWING THE DOCUMENTS ON FTP.FUNET.FI IN THE /PUB/CBM/HARDWARE/256Kб DIRECTORY. иT WILL LET YOU TO RESET THE COMPUTER SO THAT ALL OF THE 64 KILOBYTES THE PREVIOUS PROGRAM USED, WILL REMAIN INTACT. иF YOU ADD A SWITCH TO ONE OF THE MEMORY EXPANSION CONTROLLER'S CHIP SELECTION LINES, THE PROGRAM BEING EXAMINED WILL HAVE NO WAY TO SCREW THE MACHINE UP, AS THE ADDITIONAL MEMORY MANAGEMENT REGISTERS WILL NOT BE AVAILABLE. а FEW ENHANCEMENTS TO THIS CIRCUIT ARE REQUIRED SO THAT YOU CAN FREEZE THE PROGRAMS WITHOUT LOSING THE STATE OF THE и/о CHIPS. ыOU WILL ALSO NEED TO REPLACE THE кERNAL ром CHIP WITH YOUR OWN CODE, IF YOU DO NOT WANT TO LOSE THE STATE OF THE а, ь, п AND с REGISTERS. уNFORTUNATELY THIS CIRCUIT WILL NOT PRESERVE THE STATE OF THE PROCESSOR'S пERIPHERAL LINES (ITS BUILT-IN и/о PORT MAPPED TO THE MEMORY ADDRESSES 0 AND 1), NOR DOES IT RECORD THE PROGRAM COUNTER (пц). и HAVE A PARTIAL SOLUTION TO THE пц PROBLEM, THOUGH. иF YOU ARE INTERESTED IN THIS PROJECT, CONTACT ME. и WILL DESIGN THE ADDITIONAL HARDWARE, AND и WILL PROGRAM THE STARTUP ROUTINES, BUT и CERTAINLY DO NOT HAVE THE TIME TO PROGRAM ALL OF THE FREEZER SOFTWARE. мOST OF THE FREEZER SOFTWARE COULD BE IN рам, SO IT WOULD BE VERY EASY TO DEVELOP IT, AND YOU COULD EVEN USE EXISTING TOOLS BY PATCHING THEM SLIGHTLY. ============================================================================= флд - сCROLLING THE SCREEN BY мAREK кLAMPAR (KLAMPAR@ELF.STUBA.SK) сCROLLING THE SCREEN -------------------- [INSPIRATED BY пASI оJALA ARTICLE 'оPENING THE BORDERS' FROM ISSUE#6] фROM пASI 'аLBERT' оJALA'S (PO87553@CS.TUT.FI OR ALBERT@CC.TUT.FI) ARTICLE: _сCROLLING THE SCREEN_ жиц BEGINS TO DRAW THE SCREEN FROM THE FIRST BAD LINE. жиц WILL KNOW WHAT LINE IS A BAD LINE BY COMPARING ITS SCAN LINE COUNTER TO THE VERTICAL SCROLL REGISTER : WHEN THEY MATCH, THE NEXT LINE IS A BAD LINE. иF WE CHANGE THE VERTICAL SCROLL REGISTER ($D011), THE FIRST BAD LINE WILL MOVE ALSO. иF WE DO THIS ON EVERY LINE, THE LINE COUNTER IN жиц WILL NEVER MATCH WITH IT AND THE DRAWING NEVER STARTS (UNTIL IT IS ALLOWED TO DO SO). вHEN WE DON'T HAVE TO WORRY ABOUT BAD LINES, WE HAVE ENOUGH TIME TO OPEN THE BORDERS AND DO SOME OTHER EFFECTS TOO. иT IS NOT NECASSARY TO CHANGE THE VERTICAL SCROLL ON EVERY LINE TO GET RID OF THE BAD LINES, JUST MAKE SURE THAT IT NEVER MATCHES THE LINE COUNTER (OR ACTUALLY THE LEAST SIGNIFICANT 3 BITS). ыOU CAN EVEN SCROLL THE BAD LINES INDEPENDENTLY AND YOU HAVE флд - фLEXIBLE лINE дISTANCE. ыOU JUST ALLOW A BAD LINE WHEN IT IS TIME TO DISPLAY THE NEXT CHARACTER ROW. вITH THIS YOU CAN BOUNCE THE LINES OR SCROLL A HIRES PICTURE VERY FAST DOWN THE SCREEN. (*** END OF аLBERT'S PARAGRAPH ***) вELL, EVERYTHING IMPORTANT WAS WRITTEN. и'M JUST ADDING THIS: фOR MOVING HIRES PICTURE REPLACE ора #$10 BY ора #$30. фOR ANOTHER фь TRY TO REPLACE PART OF IRQ ROUTINE BEGINING WITH ора #$10 BY: ора #$ц0 ста $д016, REMOVE йср цхофс, REPLACE лдь офсет BY лдь #$FF AND ENJOY =) тHE DEMONSTARTION PROGRAM FOR флд APPLICATION ;--------------------------------------- ; цOMMODORE цRACKER 1993 ;--------------------------------------- фром = $32 то = $фа ;--------------------------------------- *= $ц000 ;--------------------------------------- инит лда #0 ста дир ; дIRECTION лда #$фф ; сET GARBAGE ста $3ффф лда #фром ста офсет ; сET OFSET сеи ; дISABLE INTERRUPT лда #$7ф ; дISABLE TIMER INTERRUPT ста $дц0д лда #1 ; еNABLE RASTER INTERRUPT ста $д01а лда #<иря ; сET IRQ VECTOR ста $0314 лда #>иря ста $0315 лда #0 ; тO EVOKE OUR IRQ ROUTINE ON 0TH LINE ста $д012 цли ; еNABLE INTERRUPT ртс ;--------------------------------------- иря лдь офсет л2 лды $д012 ; мOVING 1ST BAD LINE л1 цпы $д012 бея л1 ; вAIT FOR BEGIN OF NEXT LINE деы ; иы - BAD LINE тыа анд #$07 ; цLEAR HIGHER 5 BITS ора #$10 ; сET TEXT MODE ста $д011 деь бне л2 инц $д019 ; аCKNOWLEDGE THE RASTER INTERRUPT йср цхофс ймп $еа31 ; дO STANDARD IRQ ROUTINE ;--------------------------------------- офсет .быте фром дир .быте 0 ;--------------------------------------- цхофс лда дир ; цHANGE офсет OF SCREEN бне уп инц офсет ; дOWN лда офсет цмп #то бне скип ста дир скип ртс ;--------------------------------------- уп дец офсет ; уP лда офсет цмп #фром бне скип лда #0 ста дир ртс ============================================================================= тECH-TECH - MORE RESOLUTION TO VERTICAL SHIFT. BY пASI 'аLBERT' оJALA (PO87553@CS.TUT.FI _OR_ ALBERT@CC.TUT.FI) вRITTEN ON 16-мAY-91 тRANSLATION 02-йUN-92 (аLL TIMINGS ARE IN пал, PRINCIPLES WILL APPLY TO нтсц TOO) оNE TIME HALF OF THE DEMOS HAD PICTURES WAVING HORIZONTALLY ON THE WIDTH OF THE WHOLE SCREEN. тHIS EFFECT IS NAMED TECH-TECH, AND THE AUDIENCE WAS PUZZLED. ыOU CAN MOVE THE SCREEN ONLY EIGHT PIXELS USING THE HORIZONTAL SCROLL REGISTER. тHIS EFFECT WAS DONE USING CHARACTER GRAPHICS. хOW EXACTLY AND IS THE SAME POSSIBLE WITH SPRITES ? хORIZONTAL SCROLL REGISTER CAN MOVE THE SCREEN BY EIGHT PIXELS. тHIS ISN'T EVEN NEARLY ENOUGH TO PRODUCE A REALLY STUNNING EFFECT. ыOU HAVE TO MOVE THE GRAPHICS ITSELF, FORTUNATELY WITH A RESOLUTION OF ONE CHARACTER POSITION (ONE BYTE) ONLY, THE REST CAN BE DONE WITH THE SCROLL REGISTER. дURING ONE SCAN LINE THERE IS NO TIME TO MOVE THE ACTUAL DATA, YOU CAN ONLY MOVE A POINTER. цHANGING THE VIDEO MATRIX POINTER WON'T HELP, BECAUSE жиц (VIDEO INTERFACE CONTROLLER) WILL FETCH THE CHARACTER CODES ONLY AT CERTAIN TIMES, CALLED BAD LINES. ыOU CAN CHANGE THE CHARACTER SET POINTER INSTEAD, BECAUSE жиц READS THE DATA IT DISPLAYS DIRECTLY FROM THE CHARACTER SET MEMORY. цHARACTER SET-IMPLEMENTATION HAS ITS RESTRICTIONS бECAUSE HORIZONTAL MOVEMENT IS DONE BY CHANGING THE CHARACTER SETS, THE PICTURE OR TEXT MUST BE PURE GRAPHIC AND THE CHARACTER CODES IN THE VIDEO MATRIX MUST BE IN A NUMERICAL ORDER. тHE NORMAL PICTURE IS IN THE FIRST CHARACTER MEMORY AND IN THE NEXT ONE IT IS SHIFTED ONE CHARACTER POSITION TO THE RIGHT. оNE VIDEO BANK CAN HOLD ONLY SEVEN FULL CHARACTER MEMORIES BESIDES THE VIDEO MATRIX. тHIS LIMITS THE MOVEMENT OF THE PICTURE TO 56 PIXELS. иT IS POSSIBLE TO GET MORE MOVEMENT IF YOU USE SMALLER PICTURE OR ANOTHER VIDEO BANK. тHE SHIFT IS DONE SO THAT ON EACH SCAN LINE WE UPDATE THE HORIZONTAL SCROLL REGISTER ($д016) WITH THE THREE LOWEST BITS OF THE SHIFT VALUE. вE USE THE OTHER BITS TO SELECT THE RIGHT CHARACTER SET ($д018). иN A TECH-TECH THE SHIFT VALUE CHANGES DURING THE DISPLAY OF THE WHOLE PICTURE, AND THE VALUES ARE STORED IN A TABLE. иN ADDITION TO THAT, THE SHIFT VALUES SHOULD BE PUT INTO TWO TABLES, ONE FOR THE HORIZONTAL SCROLL REGISTER AND ANOTHER FOR THE CHARACTER SET SELECT. тHIS IS NECESSARY, BECAUSE THERE IS NO TIME FOR EXTRA CALCULATIONS ON A BAD LINE. бECAUSE WE HAVE TO CHANGE THE CHARACTER SET AND X-SCROLL DYNAMICALLY, WE ALSO NEED A RASTER ROUTINE TO SHOW A TECH-TECH. а RASTER ROUTINE IS A ROUTINE WHICH IS SYNCHRONIZED TO THE ELECTRON BEAM. тHIS EATS UP THE PROCESSOR TIME: THE BIGGER THE PICTURE, THE LESS TIME IS LEFT OVER FOR OTHER ACTIVITIES. оN OTHER THAN BAD LINES YOU CAN DO OTHER FUNNY THINGS, LIKE CHANGE THE COLOR OF THE BACKGROUND OR BORDER. аN EXAMPLE PROGRAM тHE DEMO PROGRAM USES VIDEO BANK 2, MEMORY ADDESSES $4000-7FFF. тHE VIDEO MATRIX IS IN THE BEGINNING OF THE BANK. оNLY INVERTED CHARS ARE USED FOR THE GRAPHICS, THIS WAY WE HAVE ALL EIGHT CHARACTER MEMORIES AVAILABLE AND THE MAXIMUM SHIFT IS 64 PIXELS. тHE AREA FOR THE TECH-TECH IN THE VIDEO MATRIX IS EIGHT CHARACTER ROWS HIGH, BUT IT HAS IDENTICAL GRAPHICS ON EVERY LINE. тHIS IS WHY WE USE ONLY 320 BYTES FROM EACH CHARACTER SET. ыOU CAN USE A JOYSTICK TO CONTROL THE MOVEMENT OF THE TECH-TECH. тHE STICK DECREASES OR INCREASES THE SHIFT ADD VALUE IN A RESOLUTION OF A HALF PIXEL. вHEN THE SHIFT REACHES ITS HIGHEST/LOWEST VALUE, THE DIRECTION OF THE ADD IS REVERSED. йUST EXPERIMENT WITH IT.